1. Technical Field
The present invention relates to a method of manufacturing a wafer level package.
2. Description of the Related Art
In step with the trends in electronic equipment towards lighter, thinner, and smaller products that provide higher performance, the semiconductor chip mounted in a package is becoming smaller in size and larger in capacity. Accordingly, the pads, which are portions positioned on the surface of a semiconductor chip and through which external signals can be delivered, are also decreasing in size and pitch, and are being arranged in various configurations. As such, the process of forming bonding wires for connecting the pads with a printed circuit board is becoming more and more complicated.
To overcome the difficulties in the process for forming bonding wires, a pad redistribution technique has been proposed, with which the positions of pads may be redistributed to a configuration favorable to the process for forming bonding wires. The pad redistribution technique may include sequentially forming over a finished Wafer, an insulation film pattern, a seed metal film, a photosensitive film pattern, and a metal pattern, etc., to redistribute the positions of the pads to the desired positions.
In the case of a low end product, a single-layer redistribution can provide an advantage in cost reduction, but in the case of a high-performance, high-functionality die, because of the numerous I/O (input/output) required, multiple redistribution layers may be needed for electrical connection.
FIG. 1 through FIG. 3 illustrate a wafer level package formed using a semiconductor process according to the related art, for each layer of redistribution. First, as illustrated in FIG. 1, the wafer can be flattened, and a BCB (benzocyclobutene) layer having via holes can be formed, and then, as illustrated in FIG. 2, processes of applying photoresist, exposing, developing, and etching a UBM (under-barrier metal) can be performed, to form a runner that extends from the bonding pad to the new bump pad. Next, as illustrated in FIG. 3, a second BCB layer may be stacked to protect the runner, and then finally, a solder bump may be formed over the wafer.
However, due to the high costs of manufacturing redistribution layers by semiconductor processes, a high manufacturing cost may be required to form multiple redistribution layers, which pose problems in mass production.